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<title>Static Call Graph - [SPORT_TO_CRSF\SPORT_TO_CRSF.axf]</title></head>
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<H1>Static Call Graph for image SPORT_TO_CRSF\SPORT_TO_CRSF.axf</H1><HR>
<BR><P>#&#060CALLGRAPH&#062# ARM Linker, 5060960: Last Updated: Mon Jul 28 15:50:24 2025
<BR><P>
<H3>Maximum Stack Usage =        180 bytes + Unknown(Cycles, Untraceable Function Pointers)</H3><H3>
Call chain for Maximum Stack Depth:</H3>
main &rArr; Debug_Init &rArr; MX_USART2_UART_Init &rArr; LL_USART_Init &rArr; LL_RCC_GetUSARTClockFreq &rArr; RCC_GetSystemClockFreq &rArr; RCC_PLL_GetFreqDomain_SYS &rArr; __aeabi_uidivmod
<P>
<H3>
Mutually Recursive functions
</H3> <LI><a href="#[10]">ADC1_IRQHandler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[10]">ADC1_IRQHandler</a><BR>
 <LI><a href="#[2]">HardFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[2]">HardFault_Handler</a><BR>
 <LI><a href="#[1]">NMI_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[1]">NMI_Handler</a><BR>
</UL>
<P>
<H3>
Function Pointers
</H3><UL>
 <LI><a href="#[10]">ADC1_IRQHandler</a> from startup_stm32g030xx.o(.text) referenced from startup_stm32g030xx.o(RESET)
 <LI><a href="#[f]">DMA1_Ch4_5_DMAMUX1_OVR_IRQHandler</a> from stm32g0xx_it.o(i.DMA1_Ch4_5_DMAMUX1_OVR_IRQHandler) referenced from startup_stm32g030xx.o(RESET)
 <LI><a href="#[d]">DMA1_Channel1_IRQHandler</a> from stm32g0xx_it.o(i.DMA1_Channel1_IRQHandler) referenced from startup_stm32g030xx.o(RESET)
 <LI><a href="#[e]">DMA1_Channel2_3_IRQHandler</a> from stm32g0xx_it.o(i.DMA1_Channel2_3_IRQHandler) referenced from startup_stm32g030xx.o(RESET)
 <LI><a href="#[a]">EXTI0_1_IRQHandler</a> from startup_stm32g030xx.o(.text) referenced from startup_stm32g030xx.o(RESET)
 <LI><a href="#[b]">EXTI2_3_IRQHandler</a> from startup_stm32g030xx.o(.text) referenced from startup_stm32g030xx.o(RESET)
 <LI><a href="#[c]">EXTI4_15_IRQHandler</a> from startup_stm32g030xx.o(.text) referenced from startup_stm32g030xx.o(RESET)
 <LI><a href="#[8]">FLASH_IRQHandler</a> from startup_stm32g030xx.o(.text) referenced from startup_stm32g030xx.o(RESET)
 <LI><a href="#[2]">HardFault_Handler</a> from stm32g0xx_it.o(i.HardFault_Handler) referenced from startup_stm32g030xx.o(RESET)
 <LI><a href="#[17]">I2C1_IRQHandler</a> from startup_stm32g030xx.o(.text) referenced from startup_stm32g030xx.o(RESET)
 <LI><a href="#[18]">I2C2_IRQHandler</a> from startup_stm32g030xx.o(.text) referenced from startup_stm32g030xx.o(RESET)
 <LI><a href="#[1]">NMI_Handler</a> from stm32g0xx_it.o(i.NMI_Handler) referenced from startup_stm32g030xx.o(RESET)
 <LI><a href="#[4]">PendSV_Handler</a> from stm32g0xx_it.o(i.PendSV_Handler) referenced from startup_stm32g030xx.o(RESET)
 <LI><a href="#[9]">RCC_IRQHandler</a> from startup_stm32g030xx.o(.text) referenced from startup_stm32g030xx.o(RESET)
 <LI><a href="#[7]">RTC_TAMP_IRQHandler</a> from startup_stm32g030xx.o(.text) referenced from startup_stm32g030xx.o(RESET)
 <LI><a href="#[0]">Reset_Handler</a> from startup_stm32g030xx.o(.text) referenced from startup_stm32g030xx.o(RESET)
 <LI><a href="#[19]">SPI1_IRQHandler</a> from startup_stm32g030xx.o(.text) referenced from startup_stm32g030xx.o(RESET)
 <LI><a href="#[1a]">SPI2_IRQHandler</a> from startup_stm32g030xx.o(.text) referenced from startup_stm32g030xx.o(RESET)
 <LI><a href="#[3]">SVC_Handler</a> from stm32g0xx_it.o(i.SVC_Handler) referenced from startup_stm32g030xx.o(RESET)
 <LI><a href="#[5]">SysTick_Handler</a> from stm32g0xx_it.o(i.SysTick_Handler) referenced from startup_stm32g030xx.o(RESET)
 <LI><a href="#[1e]">SystemInit</a> from system_stm32g0xx.o(i.SystemInit) referenced from startup_stm32g030xx.o(.text)
 <LI><a href="#[14]">TIM14_IRQHandler</a> from startup_stm32g030xx.o(.text) referenced from startup_stm32g030xx.o(RESET)
 <LI><a href="#[15]">TIM16_IRQHandler</a> from startup_stm32g030xx.o(.text) referenced from startup_stm32g030xx.o(RESET)
 <LI><a href="#[16]">TIM17_IRQHandler</a> from startup_stm32g030xx.o(.text) referenced from startup_stm32g030xx.o(RESET)
 <LI><a href="#[11]">TIM1_BRK_UP_TRG_COM_IRQHandler</a> from startup_stm32g030xx.o(.text) referenced from startup_stm32g030xx.o(RESET)
 <LI><a href="#[12]">TIM1_CC_IRQHandler</a> from startup_stm32g030xx.o(.text) referenced from startup_stm32g030xx.o(RESET)
 <LI><a href="#[13]">TIM3_IRQHandler</a> from startup_stm32g030xx.o(.text) referenced from startup_stm32g030xx.o(RESET)
 <LI><a href="#[1b]">USART1_IRQHandler</a> from stm32g0xx_it.o(i.USART1_IRQHandler) referenced from startup_stm32g030xx.o(RESET)
 <LI><a href="#[1c]">USART2_IRQHandler</a> from stm32g0xx_it.o(i.USART2_IRQHandler) referenced from startup_stm32g030xx.o(RESET)
 <LI><a href="#[6]">WWDG_IRQHandler</a> from startup_stm32g030xx.o(.text) referenced from startup_stm32g030xx.o(RESET)
 <LI><a href="#[1f]">__main</a> from entry.o(.ARM.Collect$$$$00000000) referenced from startup_stm32g030xx.o(.text)
 <LI><a href="#[1d]">main</a> from main.o(i.main) referenced from entry9a.o(.ARM.Collect$$$$0000000B)
</UL>
<P>
<H3>
Global Symbols
</H3>
<P><STRONG><a name="[1f]"></a>__main</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry.o(.ARM.Collect$$$$00000000))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32g030xx.o(.text)
</UL>
<P><STRONG><a name="[76]"></a>_main_stk</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry2.o(.ARM.Collect$$$$00000001))

<P><STRONG><a name="[20]"></a>_main_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
<BR><BR>[Calls]<UL><LI><a href="#[21]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
</UL>

<P><STRONG><a name="[27]"></a>__main_after_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
<BR><BR>[Called By]<UL><LI><a href="#[21]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
</UL>

<P><STRONG><a name="[77]"></a>_main_clock</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry7b.o(.ARM.Collect$$$$00000008))

<P><STRONG><a name="[78]"></a>_main_cpp_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry8b.o(.ARM.Collect$$$$0000000A))

<P><STRONG><a name="[79]"></a>_main_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry9a.o(.ARM.Collect$$$$0000000B))

<P><STRONG><a name="[22]"></a>__rt_lib_shutdown_fini</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry12b.o(.ARM.Collect$$$$0000000E))
<BR><BR>[Calls]<UL><LI><a href="#[23]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__arm_fini_ (Weak Reference)
</UL>

<P><STRONG><a name="[7a]"></a>__rt_final_cpp</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry10a.o(.ARM.Collect$$$$0000000F))

<P><STRONG><a name="[7b]"></a>__rt_final_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry11a.o(.ARM.Collect$$$$00000011))

<P><STRONG><a name="[0]"></a>Reset_Handler</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, startup_stm32g030xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32g030xx.o(RESET)
</UL>
<P><STRONG><a name="[10]"></a>ADC1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g030xx.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[10]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC1_IRQHandler
</UL>
<BR>[Called By]<UL><LI><a href="#[10]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC1_IRQHandler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32g030xx.o(RESET)
</UL>
<P><STRONG><a name="[a]"></a>EXTI0_1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g030xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32g030xx.o(RESET)
</UL>
<P><STRONG><a name="[b]"></a>EXTI2_3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g030xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32g030xx.o(RESET)
</UL>
<P><STRONG><a name="[c]"></a>EXTI4_15_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g030xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32g030xx.o(RESET)
</UL>
<P><STRONG><a name="[8]"></a>FLASH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g030xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32g030xx.o(RESET)
</UL>
<P><STRONG><a name="[17]"></a>I2C1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g030xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32g030xx.o(RESET)
</UL>
<P><STRONG><a name="[18]"></a>I2C2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g030xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32g030xx.o(RESET)
</UL>
<P><STRONG><a name="[9]"></a>RCC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g030xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32g030xx.o(RESET)
</UL>
<P><STRONG><a name="[7]"></a>RTC_TAMP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g030xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32g030xx.o(RESET)
</UL>
<P><STRONG><a name="[19]"></a>SPI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g030xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32g030xx.o(RESET)
</UL>
<P><STRONG><a name="[1a]"></a>SPI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g030xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32g030xx.o(RESET)
</UL>
<P><STRONG><a name="[14]"></a>TIM14_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g030xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32g030xx.o(RESET)
</UL>
<P><STRONG><a name="[15]"></a>TIM16_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g030xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32g030xx.o(RESET)
</UL>
<P><STRONG><a name="[16]"></a>TIM17_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g030xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32g030xx.o(RESET)
</UL>
<P><STRONG><a name="[11]"></a>TIM1_BRK_UP_TRG_COM_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g030xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32g030xx.o(RESET)
</UL>
<P><STRONG><a name="[12]"></a>TIM1_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g030xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32g030xx.o(RESET)
</UL>
<P><STRONG><a name="[13]"></a>TIM3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g030xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32g030xx.o(RESET)
</UL>
<P><STRONG><a name="[6]"></a>WWDG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32g030xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32g030xx.o(RESET)
</UL>
<P><STRONG><a name="[7c]"></a>__aeabi_uidiv</STRONG> (Thumb, 0 bytes, Stack size 12 bytes, uidiv.o(.text), UNUSED)

<P><STRONG><a name="[45]"></a>__aeabi_uidivmod</STRONG> (Thumb, 44 bytes, Stack size 12 bytes, uidiv.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = __aeabi_uidivmod
</UL>
<BR>[Called By]<UL><LI><a href="#[4b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_USART_Init
<LI><a href="#[44]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_Init1msTick
<LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_PLL_GetFreqDomain_SYS
<LI><a href="#[47]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_GetSystemClockFreq
</UL>

<P><STRONG><a name="[2a]"></a>__aeabi_memcpy</STRONG> (Thumb, 36 bytes, Stack size 0 bytes, memcpya.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[28]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CRSF_handle_byte_received
<LI><a href="#[32]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sendCRSFFrame
</UL>

<P><STRONG><a name="[7d]"></a>__aeabi_memcpy4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memcpya.o(.text), UNUSED)

<P><STRONG><a name="[7e]"></a>__aeabi_memcpy8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memcpya.o(.text), UNUSED)

<P><STRONG><a name="[25]"></a>__aeabi_memset</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[26]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_memset$wrapper
<LI><a href="#[24]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr
</UL>

<P><STRONG><a name="[7f]"></a>__aeabi_memset4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)

<P><STRONG><a name="[80]"></a>__aeabi_memset8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)

<P><STRONG><a name="[24]"></a>__aeabi_memclr</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[25]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memset
</UL>

<P><STRONG><a name="[50]"></a>__aeabi_memclr4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
<LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
<LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
</UL>

<P><STRONG><a name="[81]"></a>__aeabi_memclr8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)

<P><STRONG><a name="[26]"></a>_memset$wrapper</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, memseta.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[25]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memset
</UL>

<P><STRONG><a name="[21]"></a>__scatterload</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, init.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[27]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main_after_scatterload
</UL>
<BR>[Called By]<UL><LI><a href="#[20]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_main_scatterload
</UL>

<P><STRONG><a name="[82]"></a>__scatterload_rt2</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, init.o(.text), UNUSED)

<P><STRONG><a name="[28]"></a>CRSF_handle_byte_received</STRONG> (Thumb, 86 bytes, Stack size 24 bytes, sport.o(i.CRSF_handle_byte_received))
<BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = CRSF_handle_byte_received &rArr; calculate_crc8_from_table
</UL>
<BR>[Calls]<UL><LI><a href="#[2c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;millis
<LI><a href="#[2a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy
<LI><a href="#[2b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;shift_rx_buffer
<LI><a href="#[29]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;calculate_crc8_from_table
</UL>
<BR>[Called By]<UL><LI><a href="#[2d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CRSF_handle_uart_in
</UL>

<P><STRONG><a name="[2d]"></a>CRSF_handle_uart_in</STRONG> (Thumb, 224 bytes, Stack size 24 bytes, sport.o(i.CRSF_handle_uart_in))
<BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = CRSF_handle_uart_in &rArr; sendCRSFFrame &rArr; calcCRC
</UL>
<BR>[Calls]<UL><LI><a href="#[33]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart2_read_byte
<LI><a href="#[34]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart2_read_buf_len
<LI><a href="#[30]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart1_read_byte
<LI><a href="#[31]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart1_read_buf_len
<LI><a href="#[2c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;millis
<LI><a href="#[28]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CRSF_handle_byte_received
<LI><a href="#[2f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_GPIO_SetPinPull
<LI><a href="#[2e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_GPIO_SetPinMode
<LI><a href="#[32]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sendCRSFFrame
</UL>
<BR>[Called By]<UL><LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;loop
</UL>

<P><STRONG><a name="[f]"></a>DMA1_Ch4_5_DMAMUX1_OVR_IRQHandler</STRONG> (Thumb, 42 bytes, Stack size 8 bytes, stm32g0xx_it.o(i.DMA1_Ch4_5_DMAMUX1_OVR_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = DMA1_Ch4_5_DMAMUX1_OVR_IRQHandler &rArr; uart2_rx_dma_half_irq &rArr; fifo_write
</UL>
<BR>[Calls]<UL><LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart2_tx_dma_complete_irq
<LI><a href="#[36]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart2_rx_dma_half_irq
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32g030xx.o(RESET)
</UL>
<P><STRONG><a name="[d]"></a>DMA1_Channel1_IRQHandler</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, stm32g0xx_it.o(i.DMA1_Channel1_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = DMA1_Channel1_IRQHandler &rArr; uart1_tx_dma_complete_irq
</UL>
<BR>[Calls]<UL><LI><a href="#[38]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_DisableChannel
<LI><a href="#[37]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart1_tx_dma_complete_irq
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32g030xx.o(RESET)
</UL>
<P><STRONG><a name="[e]"></a>DMA1_Channel2_3_IRQHandler</STRONG> (Thumb, 62 bytes, Stack size 8 bytes, stm32g0xx_it.o(i.DMA1_Channel2_3_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = DMA1_Channel2_3_IRQHandler &rArr; uart1_rx_dma_half_irq &rArr; fifo_write
</UL>
<BR>[Calls]<UL><LI><a href="#[38]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_DisableChannel
<LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart2_tx_dma_complete_irq
<LI><a href="#[37]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart1_tx_dma_complete_irq
<LI><a href="#[39]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart1_rx_dma_half_irq
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32g030xx.o(RESET)
</UL>
<P><STRONG><a name="[3a]"></a>Debug_Init</STRONG> (Thumb, 240 bytes, Stack size 24 bytes, usart.o(i.Debug_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 172<LI>Call Chain = Debug_Init &rArr; MX_USART2_UART_Init &rArr; LL_USART_Init &rArr; LL_RCC_GetUSARTClockFreq &rArr; RCC_GetSystemClockFreq &rArr; RCC_PLL_GetFreqDomain_SYS &rArr; __aeabi_uidivmod
</UL>
<BR>[Calls]<UL><LI><a href="#[3c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fifo_init
<LI><a href="#[3b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;crc8_init
<LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
<LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
<LI><a href="#[43]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_SetPriority
<LI><a href="#[41]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_SetPeriphAddress
<LI><a href="#[3f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_SetMemoryAddress
<LI><a href="#[40]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_SetDataLength
<LI><a href="#[42]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_EnableIT_TC
</UL>
<BR>[Called By]<UL><LI><a href="#[1d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[2]"></a>HardFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32g0xx_it.o(i.HardFault_Handler))
<BR><BR>[Calls]<UL><LI><a href="#[2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HardFault_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HardFault_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32g030xx.o(RESET)
</UL>
<P><STRONG><a name="[52]"></a>LL_GPIO_Init</STRONG> (Thumb, 172 bytes, Stack size 20 bytes, stm32g0xx_ll_gpio.o(i.LL_GPIO_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = LL_GPIO_Init
</UL>
<BR>[Called By]<UL><LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
<LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
<LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
</UL>

<P><STRONG><a name="[44]"></a>LL_Init1msTick</STRONG> (Thumb, 26 bytes, Stack size 8 bytes, stm32g0xx_ll_utils.o(i.LL_Init1msTick))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = LL_Init1msTick &rArr; __aeabi_uidivmod
</UL>
<BR>[Calls]<UL><LI><a href="#[45]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uidivmod
</UL>
<BR>[Called By]<UL><LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
</UL>

<P><STRONG><a name="[46]"></a>LL_RCC_GetSystemClocksFreq</STRONG> (Thumb, 24 bytes, Stack size 8 bytes, stm32g0xx_ll_rcc.o(i.LL_RCC_GetSystemClocksFreq))
<BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = LL_RCC_GetSystemClocksFreq &rArr; RCC_GetSystemClockFreq &rArr; RCC_PLL_GetFreqDomain_SYS &rArr; __aeabi_uidivmod
</UL>
<BR>[Calls]<UL><LI><a href="#[47]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_GetSystemClockFreq
<LI><a href="#[49]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_GetPCLK1ClockFreq
<LI><a href="#[48]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_GetHCLKClockFreq
</UL>
<BR>[Called By]<UL><LI><a href="#[4b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_USART_Init
</UL>

<P><STRONG><a name="[4a]"></a>LL_RCC_GetUSARTClockFreq</STRONG> (Thumb, 88 bytes, Stack size 8 bytes, stm32g0xx_ll_rcc.o(i.LL_RCC_GetUSARTClockFreq))
<BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = LL_RCC_GetUSARTClockFreq &rArr; RCC_GetSystemClockFreq &rArr; RCC_PLL_GetFreqDomain_SYS &rArr; __aeabi_uidivmod
</UL>
<BR>[Calls]<UL><LI><a href="#[47]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_GetSystemClockFreq
<LI><a href="#[49]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_GetPCLK1ClockFreq
<LI><a href="#[48]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_GetHCLKClockFreq
</UL>
<BR>[Called By]<UL><LI><a href="#[4b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_USART_Init
</UL>

<P><STRONG><a name="[64]"></a>LL_SetSystemCoreClock</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32g0xx_ll_utils.o(i.LL_SetSystemCoreClock))
<BR><BR>[Called By]<UL><LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
</UL>

<P><STRONG><a name="[4b]"></a>LL_USART_Init</STRONG> (Thumb, 204 bytes, Stack size 32 bytes, stm32g0xx_ll_usart.o(i.LL_USART_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 68<LI>Call Chain = LL_USART_Init &rArr; LL_RCC_GetUSARTClockFreq &rArr; RCC_GetSystemClockFreq &rArr; RCC_PLL_GetFreqDomain_SYS &rArr; __aeabi_uidivmod
</UL>
<BR>[Calls]<UL><LI><a href="#[45]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uidivmod
<LI><a href="#[4a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_RCC_GetUSARTClockFreq
<LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_RCC_GetSystemClocksFreq
</UL>
<BR>[Called By]<UL><LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
<LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
</UL>

<P><STRONG><a name="[4c]"></a>MX_DMA_Init</STRONG> (Thumb, 62 bytes, Stack size 8 bytes, dma.o(i.MX_DMA_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = MX_DMA_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[4d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_SetPriority
<LI><a href="#[4e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_EnableIRQ
</UL>
<BR>[Called By]<UL><LI><a href="#[1d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[4f]"></a>MX_GPIO_Init</STRONG> (Thumb, 80 bytes, Stack size 32 bytes, gpio.o(i.MX_GPIO_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = MX_GPIO_Init &rArr; LL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_GPIO_Init
<LI><a href="#[51]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_IOP_GRP1_EnableClock
<LI><a href="#[50]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
</UL>
<BR>[Called By]<UL><LI><a href="#[1d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[6b]"></a>MX_IWDG_Init</STRONG> (Thumb, 30 bytes, Stack size 0 bytes, iwdg.o(i.MX_IWDG_Init))
<BR><BR>[Called By]<UL><LI><a href="#[1d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[3d]"></a>MX_USART1_UART_Init</STRONG> (Thumb, 522 bytes, Stack size 80 bytes, usart.o(i.MX_USART1_UART_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 148<LI>Call Chain = MX_USART1_UART_Init &rArr; LL_USART_Init &rArr; LL_RCC_GetUSARTClockFreq &rArr; RCC_GetSystemClockFreq &rArr; RCC_PLL_GetFreqDomain_SYS &rArr; __aeabi_uidivmod
</UL>
<BR>[Calls]<UL><LI><a href="#[4b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_USART_Init
<LI><a href="#[43]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_SetPriority
<LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_EnableIRQ
<LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_USART_ConfigAsyncMode
<LI><a href="#[53]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_IOP_GRP1_EnableClock
<LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_SetPeriphSize
<LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_SetPeriphRequest
<LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_SetPeriphIncMode
<LI><a href="#[41]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_SetPeriphAddress
<LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_SetMode
<LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_SetMemorySize
<LI><a href="#[59]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_SetMemoryIncMode
<LI><a href="#[3f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_SetMemoryAddress
<LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_SetDataTransferDirection
<LI><a href="#[40]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_SetDataLength
<LI><a href="#[56]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_SetChannelPriorityLevel
<LI><a href="#[42]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_EnableIT_TC
<LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_EnableIT_HT
<LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_EnableChannel
<LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_GPIO_Init
<LI><a href="#[50]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
</UL>
<BR>[Called By]<UL><LI><a href="#[3a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Debug_Init
</UL>

<P><STRONG><a name="[3e]"></a>MX_USART2_UART_Init</STRONG> (Thumb, 426 bytes, Stack size 80 bytes, usart.o(i.MX_USART2_UART_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 148<LI>Call Chain = MX_USART2_UART_Init &rArr; LL_USART_Init &rArr; LL_RCC_GetUSARTClockFreq &rArr; RCC_GetSystemClockFreq &rArr; RCC_PLL_GetFreqDomain_SYS &rArr; __aeabi_uidivmod
</UL>
<BR>[Calls]<UL><LI><a href="#[4b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_USART_Init
<LI><a href="#[43]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_SetPriority
<LI><a href="#[5d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_EnableIRQ
<LI><a href="#[5e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_USART_ConfigAsyncMode
<LI><a href="#[53]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_IOP_GRP1_EnableClock
<LI><a href="#[5a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_SetPeriphSize
<LI><a href="#[54]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_SetPeriphRequest
<LI><a href="#[58]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_SetPeriphIncMode
<LI><a href="#[41]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_SetPeriphAddress
<LI><a href="#[57]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_SetMode
<LI><a href="#[5b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_SetMemorySize
<LI><a href="#[59]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_SetMemoryIncMode
<LI><a href="#[3f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_SetMemoryAddress
<LI><a href="#[55]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_SetDataTransferDirection
<LI><a href="#[40]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_SetDataLength
<LI><a href="#[56]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_SetChannelPriorityLevel
<LI><a href="#[42]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_EnableIT_TC
<LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_EnableChannel
<LI><a href="#[52]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_GPIO_Init
<LI><a href="#[50]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
</UL>
<BR>[Called By]<UL><LI><a href="#[3a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Debug_Init
</UL>

<P><STRONG><a name="[1]"></a>NMI_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32g0xx_it.o(i.NMI_Handler))
<BR><BR>[Calls]<UL><LI><a href="#[1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NMI_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NMI_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32g030xx.o(RESET)
</UL>
<P><STRONG><a name="[4]"></a>PendSV_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32g0xx_it.o(i.PendSV_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32g030xx.o(RESET)
</UL>
<P><STRONG><a name="[48]"></a>RCC_GetHCLKClockFreq</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, stm32g0xx_ll_rcc.o(i.RCC_GetHCLKClockFreq))
<BR><BR>[Called By]<UL><LI><a href="#[4a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_RCC_GetUSARTClockFreq
<LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_RCC_GetSystemClocksFreq
</UL>

<P><STRONG><a name="[49]"></a>RCC_GetPCLK1ClockFreq</STRONG> (Thumb, 22 bytes, Stack size 0 bytes, stm32g0xx_ll_rcc.o(i.RCC_GetPCLK1ClockFreq))
<BR><BR>[Called By]<UL><LI><a href="#[4a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_RCC_GetUSARTClockFreq
<LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_RCC_GetSystemClocksFreq
</UL>

<P><STRONG><a name="[47]"></a>RCC_GetSystemClockFreq</STRONG> (Thumb, 46 bytes, Stack size 8 bytes, stm32g0xx_ll_rcc.o(i.RCC_GetSystemClockFreq))
<BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = RCC_GetSystemClockFreq &rArr; RCC_PLL_GetFreqDomain_SYS &rArr; __aeabi_uidivmod
</UL>
<BR>[Calls]<UL><LI><a href="#[45]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uidivmod
<LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_PLL_GetFreqDomain_SYS
</UL>
<BR>[Called By]<UL><LI><a href="#[4a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_RCC_GetUSARTClockFreq
<LI><a href="#[46]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_RCC_GetSystemClocksFreq
</UL>

<P><STRONG><a name="[60]"></a>RCC_PLL_GetFreqDomain_SYS</STRONG> (Thumb, 56 bytes, Stack size 8 bytes, stm32g0xx_ll_rcc.o(i.RCC_PLL_GetFreqDomain_SYS))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = RCC_PLL_GetFreqDomain_SYS &rArr; __aeabi_uidivmod
</UL>
<BR>[Calls]<UL><LI><a href="#[45]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uidivmod
</UL>
<BR>[Called By]<UL><LI><a href="#[47]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCC_GetSystemClockFreq
</UL>

<P><STRONG><a name="[67]"></a>SPORT_get_state</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, sport.o(i.SPORT_get_state))
<BR><BR>[Called By]<UL><LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_timer_callback
</UL>

<P><STRONG><a name="[3]"></a>SVC_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32g0xx_it.o(i.SVC_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32g030xx.o(RESET)
</UL>
<P><STRONG><a name="[5]"></a>SysTick_Handler</STRONG> (Thumb, 12 bytes, Stack size 8 bytes, stm32g0xx_it.o(i.SysTick_Handler))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = SysTick_Handler &rArr; app_timer_callback
</UL>
<BR>[Calls]<UL><LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_timer_callback
<LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main_timer_callback
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32g030xx.o(RESET)
</UL>
<P><STRONG><a name="[63]"></a>SystemClock_Config</STRONG> (Thumb, 168 bytes, Stack size 16 bytes, main.o(i.SystemClock_Config))
<BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = SystemClock_Config &rArr; LL_Init1msTick &rArr; __aeabi_uidivmod
</UL>
<BR>[Calls]<UL><LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_SetSystemCoreClock
<LI><a href="#[44]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_Init1msTick
</UL>
<BR>[Called By]<UL><LI><a href="#[1d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[1e]"></a>SystemInit</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, system_stm32g0xx.o(i.SystemInit))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32g030xx.o(.text)
</UL>
<P><STRONG><a name="[1b]"></a>USART1_IRQHandler</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, stm32g0xx_it.o(i.USART1_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = USART1_IRQHandler &rArr; uart1_rx_idle_irq &rArr; fifo_write
</UL>
<BR>[Calls]<UL><LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart1_rx_idle_irq
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32g030xx.o(RESET)
</UL>
<P><STRONG><a name="[1c]"></a>USART2_IRQHandler</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, stm32g0xx_it.o(i.USART2_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = USART2_IRQHandler &rArr; uart2_rx_idle_irq &rArr; fifo_write
</UL>
<BR>[Calls]<UL><LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart2_rx_idle_irq
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32g030xx.o(RESET)
</UL>
<P><STRONG><a name="[83]"></a>__scatterload_copy</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_copy), UNUSED)

<P><STRONG><a name="[84]"></a>__scatterload_null</STRONG> (Thumb, 2 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_null), UNUSED)

<P><STRONG><a name="[85]"></a>__scatterload_zeroinit</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_zeroinit), UNUSED)

<P><STRONG><a name="[62]"></a>app_timer_callback</STRONG> (Thumb, 72 bytes, Stack size 16 bytes, application.o(i.app_timer_callback))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = app_timer_callback
</UL>
<BR>[Calls]<UL><LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;led_on
<LI><a href="#[68]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;led_off
<LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SPORT_get_state
</UL>
<BR>[Called By]<UL><LI><a href="#[5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_Handler
</UL>

<P><STRONG><a name="[6c]"></a>calcCRC</STRONG> (Thumb, 50 bytes, Stack size 16 bytes, crsf.o(i.calcCRC))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = calcCRC
</UL>
<BR>[Called By]<UL><LI><a href="#[32]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sendCRSFFrame
</UL>

<P><STRONG><a name="[29]"></a>calculate_crc8_from_table</STRONG> (Thumb, 26 bytes, Stack size 12 bytes, crc.o(i.calculate_crc8_from_table))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = calculate_crc8_from_table
</UL>
<BR>[Called By]<UL><LI><a href="#[28]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CRSF_handle_byte_received
</UL>

<P><STRONG><a name="[3b]"></a>crc8_init</STRONG> (Thumb, 46 bytes, Stack size 8 bytes, crc.o(i.crc8_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = crc8_init
</UL>
<BR>[Called By]<UL><LI><a href="#[3a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Debug_Init
</UL>

<P><STRONG><a name="[71]"></a>fifo_get_len</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, fifo.o(i.fifo_get_len))
<BR><BR>[Called By]<UL><LI><a href="#[34]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart2_read_buf_len
<LI><a href="#[31]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart1_read_buf_len
</UL>

<P><STRONG><a name="[3c]"></a>fifo_init</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, fifo.o(i.fifo_init))
<BR><BR>[Called By]<UL><LI><a href="#[3a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Debug_Init
</UL>

<P><STRONG><a name="[72]"></a>fifo_read</STRONG> (Thumb, 56 bytes, Stack size 16 bytes, fifo.o(i.fifo_read))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = fifo_read
</UL>
<BR>[Called By]<UL><LI><a href="#[33]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart2_read_byte
<LI><a href="#[30]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart1_read_byte
</UL>

<P><STRONG><a name="[73]"></a>fifo_write</STRONG> (Thumb, 62 bytes, Stack size 20 bytes, fifo.o(i.fifo_write))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = fifo_write
</UL>
<BR>[Called By]<UL><LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart2_rx_idle_irq
<LI><a href="#[36]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart2_rx_dma_half_irq
<LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart1_rx_idle_irq
<LI><a href="#[39]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart1_rx_dma_half_irq
</UL>

<P><STRONG><a name="[68]"></a>led_off</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, stm32g0xx_it.o(i.led_off))
<BR><BR>[Called By]<UL><LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_timer_callback
</UL>

<P><STRONG><a name="[69]"></a>led_on</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, stm32g0xx_it.o(i.led_on))
<BR><BR>[Called By]<UL><LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;app_timer_callback
</UL>

<P><STRONG><a name="[6a]"></a>loop</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, application.o(i.loop))
<BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = loop &rArr; CRSF_handle_uart_in &rArr; sendCRSFFrame &rArr; calcCRC
</UL>
<BR>[Calls]<UL><LI><a href="#[2d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CRSF_handle_uart_in
</UL>
<BR>[Called By]<UL><LI><a href="#[1d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[1d]"></a>main</STRONG> (Thumb, 72 bytes, Stack size 8 bytes, main.o(i.main))
<BR><BR>[Stack]<UL><LI>Max Depth = 180<LI>Call Chain = main &rArr; Debug_Init &rArr; MX_USART2_UART_Init &rArr; LL_USART_Init &rArr; LL_RCC_GetUSARTClockFreq &rArr; RCC_GetSystemClockFreq &rArr; RCC_PLL_GetFreqDomain_SYS &rArr; __aeabi_uidivmod
</UL>
<BR>[Calls]<UL><LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;loop
<LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_IWDG_Init
<LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
<LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_DMA_Init
<LI><a href="#[3a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Debug_Init
<LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
</UL>
<BR>[Address Reference Count : 1]<UL><LI> entry9a.o(.ARM.Collect$$$$0000000B)
</UL>
<P><STRONG><a name="[61]"></a>main_timer_callback</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, main.o(i.main_timer_callback))
<BR><BR>[Called By]<UL><LI><a href="#[5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_Handler
</UL>

<P><STRONG><a name="[2c]"></a>millis</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, main.o(i.millis))
<BR><BR>[Called By]<UL><LI><a href="#[28]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CRSF_handle_byte_received
<LI><a href="#[2d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CRSF_handle_uart_in
</UL>

<P><STRONG><a name="[32]"></a>sendCRSFFrame</STRONG> (Thumb, 196 bytes, Stack size 48 bytes, crsf.o(i.sendCRSFFrame))
<BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = sendCRSFFrame &rArr; calcCRC
</UL>
<BR>[Calls]<UL><LI><a href="#[2a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy
<LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;calcCRC
<LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_SetDataLength
<LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_IsEnabledChannel
<LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_EnableChannel
<LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_DisableChannel
</UL>
<BR>[Called By]<UL><LI><a href="#[2d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CRSF_handle_uart_in
</UL>

<P><STRONG><a name="[2b]"></a>shift_rx_buffer</STRONG> (Thumb, 48 bytes, Stack size 8 bytes, sport.o(i.shift_rx_buffer))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = shift_rx_buffer
</UL>
<BR>[Called By]<UL><LI><a href="#[28]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CRSF_handle_byte_received
</UL>

<P><STRONG><a name="[31]"></a>uart1_read_buf_len</STRONG> (Thumb, 10 bytes, Stack size 8 bytes, usart.o(i.uart1_read_buf_len))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = uart1_read_buf_len
</UL>
<BR>[Calls]<UL><LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fifo_get_len
</UL>
<BR>[Called By]<UL><LI><a href="#[2d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CRSF_handle_uart_in
</UL>

<P><STRONG><a name="[30]"></a>uart1_read_byte</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, usart.o(i.uart1_read_byte))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = uart1_read_byte &rArr; fifo_read
</UL>
<BR>[Calls]<UL><LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fifo_read
</UL>
<BR>[Called By]<UL><LI><a href="#[2d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CRSF_handle_uart_in
</UL>

<P><STRONG><a name="[39]"></a>uart1_rx_dma_half_irq</STRONG> (Thumb, 26 bytes, Stack size 16 bytes, usart.o(i.uart1_rx_dma_half_irq))
<BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = uart1_rx_dma_half_irq &rArr; fifo_write
</UL>
<BR>[Calls]<UL><LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fifo_write
</UL>
<BR>[Called By]<UL><LI><a href="#[e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Channel2_3_IRQHandler
</UL>

<P><STRONG><a name="[65]"></a>uart1_rx_idle_irq</STRONG> (Thumb, 36 bytes, Stack size 16 bytes, usart.o(i.uart1_rx_idle_irq))
<BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = uart1_rx_idle_irq &rArr; fifo_write
</UL>
<BR>[Calls]<UL><LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fifo_write
<LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_GetDataLength
</UL>
<BR>[Called By]<UL><LI><a href="#[1b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART1_IRQHandler
</UL>

<P><STRONG><a name="[37]"></a>uart1_tx_dma_complete_irq</STRONG> (Thumb, 12 bytes, Stack size 8 bytes, usart.o(i.uart1_tx_dma_complete_irq))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = uart1_tx_dma_complete_irq
</UL>
<BR>[Calls]<UL><LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_DisableChannel
</UL>
<BR>[Called By]<UL><LI><a href="#[e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Channel2_3_IRQHandler
<LI><a href="#[d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Channel1_IRQHandler
</UL>

<P><STRONG><a name="[34]"></a>uart2_read_buf_len</STRONG> (Thumb, 10 bytes, Stack size 8 bytes, usart.o(i.uart2_read_buf_len))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = uart2_read_buf_len
</UL>
<BR>[Calls]<UL><LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fifo_get_len
</UL>
<BR>[Called By]<UL><LI><a href="#[2d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CRSF_handle_uart_in
</UL>

<P><STRONG><a name="[33]"></a>uart2_read_byte</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, usart.o(i.uart2_read_byte))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = uart2_read_byte &rArr; fifo_read
</UL>
<BR>[Calls]<UL><LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fifo_read
</UL>
<BR>[Called By]<UL><LI><a href="#[2d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CRSF_handle_uart_in
</UL>

<P><STRONG><a name="[36]"></a>uart2_rx_dma_half_irq</STRONG> (Thumb, 26 bytes, Stack size 16 bytes, usart.o(i.uart2_rx_dma_half_irq))
<BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = uart2_rx_dma_half_irq &rArr; fifo_write
</UL>
<BR>[Calls]<UL><LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fifo_write
</UL>
<BR>[Called By]<UL><LI><a href="#[f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Ch4_5_DMAMUX1_OVR_IRQHandler
</UL>

<P><STRONG><a name="[66]"></a>uart2_rx_idle_irq</STRONG> (Thumb, 36 bytes, Stack size 16 bytes, usart.o(i.uart2_rx_idle_irq))
<BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = uart2_rx_idle_irq &rArr; fifo_write
</UL>
<BR>[Calls]<UL><LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fifo_write
<LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_GetDataLength
</UL>
<BR>[Called By]<UL><LI><a href="#[1c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART2_IRQHandler
</UL>

<P><STRONG><a name="[35]"></a>uart2_tx_dma_complete_irq</STRONG> (Thumb, 12 bytes, Stack size 8 bytes, usart.o(i.uart2_tx_dma_complete_irq))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = uart2_tx_dma_complete_irq
</UL>
<BR>[Calls]<UL><LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_DMA_DisableChannel
</UL>
<BR>[Called By]<UL><LI><a href="#[e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Channel2_3_IRQHandler
<LI><a href="#[f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Ch4_5_DMAMUX1_OVR_IRQHandler
</UL>
<P>
<H3>
Local Symbols
</H3>
<P><STRONG><a name="[51]"></a>LL_IOP_GRP1_EnableClock</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, gpio.o(i.LL_IOP_GRP1_EnableClock))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = LL_IOP_GRP1_EnableClock
</UL>
<BR>[Called By]<UL><LI><a href="#[4f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
</UL>

<P><STRONG><a name="[4e]"></a>__NVIC_EnableIRQ</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, dma.o(i.__NVIC_EnableIRQ))
<BR><BR>[Called By]<UL><LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_DMA_Init
</UL>

<P><STRONG><a name="[4d]"></a>__NVIC_SetPriority</STRONG> (Thumb, 60 bytes, Stack size 0 bytes, dma.o(i.__NVIC_SetPriority))
<BR><BR>[Called By]<UL><LI><a href="#[4c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_DMA_Init
</UL>

<P><STRONG><a name="[75]"></a>LL_DMA_DisableChannel</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, usart.o(i.LL_DMA_DisableChannel))
<BR><BR>[Called By]<UL><LI><a href="#[35]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart2_tx_dma_complete_irq
<LI><a href="#[37]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart1_tx_dma_complete_irq
</UL>

<P><STRONG><a name="[5f]"></a>LL_DMA_EnableChannel</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, usart.o(i.LL_DMA_EnableChannel))
<BR><BR>[Called By]<UL><LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
<LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
</UL>

<P><STRONG><a name="[5c]"></a>LL_DMA_EnableIT_HT</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, usart.o(i.LL_DMA_EnableIT_HT))
<BR><BR>[Called By]<UL><LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
</UL>

<P><STRONG><a name="[42]"></a>LL_DMA_EnableIT_TC</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, usart.o(i.LL_DMA_EnableIT_TC))
<BR><BR>[Called By]<UL><LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
<LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
<LI><a href="#[3a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Debug_Init
</UL>

<P><STRONG><a name="[74]"></a>LL_DMA_GetDataLength</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, usart.o(i.LL_DMA_GetDataLength))
<BR><BR>[Called By]<UL><LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart2_rx_idle_irq
<LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uart1_rx_idle_irq
</UL>

<P><STRONG><a name="[56]"></a>LL_DMA_SetChannelPriorityLevel</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, usart.o(i.LL_DMA_SetChannelPriorityLevel))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = LL_DMA_SetChannelPriorityLevel
</UL>
<BR>[Called By]<UL><LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
<LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
</UL>

<P><STRONG><a name="[40]"></a>LL_DMA_SetDataLength</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, usart.o(i.LL_DMA_SetDataLength))
<BR><BR>[Called By]<UL><LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
<LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
<LI><a href="#[3a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Debug_Init
</UL>

<P><STRONG><a name="[55]"></a>LL_DMA_SetDataTransferDirection</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, usart.o(i.LL_DMA_SetDataTransferDirection))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = LL_DMA_SetDataTransferDirection
</UL>
<BR>[Called By]<UL><LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
<LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
</UL>

<P><STRONG><a name="[3f]"></a>LL_DMA_SetMemoryAddress</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, usart.o(i.LL_DMA_SetMemoryAddress))
<BR><BR>[Called By]<UL><LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
<LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
<LI><a href="#[3a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Debug_Init
</UL>

<P><STRONG><a name="[59]"></a>LL_DMA_SetMemoryIncMode</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, usart.o(i.LL_DMA_SetMemoryIncMode))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = LL_DMA_SetMemoryIncMode
</UL>
<BR>[Called By]<UL><LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
<LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
</UL>

<P><STRONG><a name="[5b]"></a>LL_DMA_SetMemorySize</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, usart.o(i.LL_DMA_SetMemorySize))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = LL_DMA_SetMemorySize
</UL>
<BR>[Called By]<UL><LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
<LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
</UL>

<P><STRONG><a name="[57]"></a>LL_DMA_SetMode</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, usart.o(i.LL_DMA_SetMode))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = LL_DMA_SetMode
</UL>
<BR>[Called By]<UL><LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
<LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
</UL>

<P><STRONG><a name="[41]"></a>LL_DMA_SetPeriphAddress</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, usart.o(i.LL_DMA_SetPeriphAddress))
<BR><BR>[Called By]<UL><LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
<LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
<LI><a href="#[3a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Debug_Init
</UL>

<P><STRONG><a name="[58]"></a>LL_DMA_SetPeriphIncMode</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, usart.o(i.LL_DMA_SetPeriphIncMode))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = LL_DMA_SetPeriphIncMode
</UL>
<BR>[Called By]<UL><LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
<LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
</UL>

<P><STRONG><a name="[54]"></a>LL_DMA_SetPeriphRequest</STRONG> (Thumb, 30 bytes, Stack size 0 bytes, usart.o(i.LL_DMA_SetPeriphRequest))
<BR><BR>[Called By]<UL><LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
<LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
</UL>

<P><STRONG><a name="[5a]"></a>LL_DMA_SetPeriphSize</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, usart.o(i.LL_DMA_SetPeriphSize))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = LL_DMA_SetPeriphSize
</UL>
<BR>[Called By]<UL><LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
<LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
</UL>

<P><STRONG><a name="[53]"></a>LL_IOP_GRP1_EnableClock</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, usart.o(i.LL_IOP_GRP1_EnableClock))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = LL_IOP_GRP1_EnableClock
</UL>
<BR>[Called By]<UL><LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
<LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
</UL>

<P><STRONG><a name="[5e]"></a>LL_USART_ConfigAsyncMode</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, usart.o(i.LL_USART_ConfigAsyncMode))
<BR><BR>[Called By]<UL><LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
<LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
</UL>

<P><STRONG><a name="[5d]"></a>__NVIC_EnableIRQ</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, usart.o(i.__NVIC_EnableIRQ))
<BR><BR>[Called By]<UL><LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
<LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
</UL>

<P><STRONG><a name="[43]"></a>__NVIC_SetPriority</STRONG> (Thumb, 60 bytes, Stack size 0 bytes, usart.o(i.__NVIC_SetPriority))
<BR><BR>[Called By]<UL><LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
<LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
<LI><a href="#[3a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Debug_Init
</UL>

<P><STRONG><a name="[38]"></a>LL_DMA_DisableChannel</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, stm32g0xx_it.o(i.LL_DMA_DisableChannel))
<BR><BR>[Called By]<UL><LI><a href="#[e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Channel2_3_IRQHandler
<LI><a href="#[d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Channel1_IRQHandler
</UL>

<P><STRONG><a name="[6e]"></a>LL_DMA_DisableChannel</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, crsf.o(i.LL_DMA_DisableChannel))
<BR><BR>[Called By]<UL><LI><a href="#[32]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sendCRSFFrame
</UL>

<P><STRONG><a name="[70]"></a>LL_DMA_EnableChannel</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, crsf.o(i.LL_DMA_EnableChannel))
<BR><BR>[Called By]<UL><LI><a href="#[32]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sendCRSFFrame
</UL>

<P><STRONG><a name="[6d]"></a>LL_DMA_IsEnabledChannel</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, crsf.o(i.LL_DMA_IsEnabledChannel))
<BR><BR>[Called By]<UL><LI><a href="#[32]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sendCRSFFrame
</UL>

<P><STRONG><a name="[6f]"></a>LL_DMA_SetDataLength</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, crsf.o(i.LL_DMA_SetDataLength))
<BR><BR>[Called By]<UL><LI><a href="#[32]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sendCRSFFrame
</UL>

<P><STRONG><a name="[2e]"></a>LL_GPIO_SetPinMode</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, sport.o(i.LL_GPIO_SetPinMode))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = LL_GPIO_SetPinMode
</UL>
<BR>[Called By]<UL><LI><a href="#[2d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CRSF_handle_uart_in
</UL>

<P><STRONG><a name="[2f]"></a>LL_GPIO_SetPinPull</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, sport.o(i.LL_GPIO_SetPinPull))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = LL_GPIO_SetPinPull
</UL>
<BR>[Called By]<UL><LI><a href="#[2d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CRSF_handle_uart_in
</UL>
<P>
<H3>
Undefined Global Symbols
</H3>
<P><STRONG><a name="[23]"></a>__arm_fini_</STRONG> (Unknown, 0 bytes, Stack size 0 bytes, UNDEFINED)
<BR><BR>[Called By]<UL><LI><a href="#[22]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__rt_lib_shutdown_fini
</UL>
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